Tseng Labs ET4000

The Tseng ET4000AX chip in QFP

The Tseng Labs ET4000 was a line of SVGA graphics controller chips during the early 1990s, commonly found in many 386/486 and compatible systems, with some models, notably the ET4000/W32 and later chips, offering graphics acceleration. Offering above average host interface throughput coupled with a moderate price, Tseng Labs' ET4000 chipset family were well regarded for their performance, and were integrated into many companies' lineups, notably with Hercules' Dynamite series, the Diamond Stealth 32 and several Speedstar cards, and on many generic boards.

Models

ET4000AX

Orchid Prodesigner IIs ISA with ET4000AX

The ET4000AX was a major advancement over Tseng Labs' earlier ET3000 SVGA chipset, featuring a new 16-bit host interface controller with deep FIFO buffering and caching capabilities, and an enhanced, variable-width memory interface with support for up to 1MB of memory with a ≈16-bit VRAM or ≈32-bit DRAM memory data bus width. The FIFO buffers and cache functions had the effect of greatly improving host interface throughput, and therefore offering substantially improved redraw performance compared to the ET3000 and most of its contemporaries. The interface controller also offered support for IBM's MCA bus, in addition to an 8 or 16-bit ISA bus. The ET4000AX could also support the emerging VESA Local Bus standard with some additional external logic, albeit with a 16-bit host bus width.

Neither the ET4000AX or its succeeding family members offered an integrated RAMDAC, which hampered the line's cost/performance competitiveness later on.

ET4000/W32

Diamond Stealth 32 VLB with ET4000/W32p

Hardware acceleration via dedicated BitBLT hardware and a hardware cursor sprite was introduced in the ET4000/W32. The W32 offered improved local bus support along with further increased host interface performance, but by the time PCI Windows accelerators became commonplace, high host throughput was no longer a distinguishing feature. Nevertheless, as a mid-priced Windows accelerator, the W32 benchmarked favorably against competing mid-range S3 and ATI chips. Configured with 32-bit asynchronous EDO/FPM (70 ns) DRAM, the W32 could sustain a transfer speed of ≈56 MB/s.

ET4000/W32i

The W32i revision featured an interleaved 32-bit memory bus (with 2 MB+ of memory) to improve memory throughput. It supports a maximum of 4 MB of video memory, though most boards featuring the chip typically offer a maximum expansion of 2 MB or less.

ET4000/W32p

Integral Technologies I4596 PCI with ET4000/W32P

The W32p model offered support for the PCI bus, although earlier revisions of this chip (prior to Revision D) had some design problems that caused sub-optimal or problematic operation when used in PCI implementations, although VLB implementations were unaffected.